Flags and Instruction Pointer (RFLAGS & RIP)
Flags and Instruction Pointer (RFLAGS & RIP)
This page explains two special control elements of the CPU: the flag register, which stores status bits set by operations, and the instruction pointer, which tracks the flow of program execution.
Flags
A flag is a single bit representing a specific condition that resulted from the last CPU operation. Flags are grouped together in a special register:
- FLAGS (16-bit)
- EFLAGS (32-bit)
- RFLAGS (64-bit)
Flags are automatically set or cleared by instructions. They are later used by conditional or arithmetic instructions to make decisions.
Common flags
Abbreviation | Name | Description
| ---- | ------------
CF | Carry flag | Set when an arithmetic operation generates a carry or borrow. ZF | Zero flag | Set when an arithmetic result equals zero. SF | Sign flag | Set when the result is negative (the highest bit is 1). OF | Overflow flag | Set when a result does not fit in the available number of bits.
Example:
mov al, 0x7F ; AL = 127
add al, 0x01 ; AL = 128 (overflow for signed 8-bit)
; OF = 1 (overflow flag set)
Flags can be checked by conditional instructions such as JE (jump if equal) or JNE (jump if not equal).
Instruction pointer
The **instruction pointer** holds the memory address of the instruction currently being executed. Each time an instruction finishes, the CPU automatically increments this pointer by the size of the executed instruction.
On x86 architectures, the name depends on mode:
- 16-bit: IP
- 32-bit: EIP
- 64-bit: RIP
Characteristics:
- The instruction pointer cannot be directly modified by normal MOV instructions.
- It changes automatically during sequential execution.
- Control flow instructions (CALL, RET, JMP, Jcc) alter its value explicitly.
Example:
; Assume RIP = 0x00401000
jmp 0x00401010 ; Jump changes RIP to new address
Segment registers
Legacy x86 CPUs include special registers: CS, DS, SS, ES, FS, and GS. These were used for segmented memory addressing but are mostly obsolete since the Intel 80386 introduced flat addressing. They remain present for compatibility and specialized use cases such as thread-local storage.
Summary
- The **flag register** holds one-bit indicators used for conditional logic.
- The **instruction pointer** determines which instruction is executed next.
Together, they allow CPUs to handle program flow and decision-making efficiently.